Prospective authors are cordially invited to submit original papers to the Symposium. Papers in English with a length of 6 pages maximum in IEEE conference style are expected. Specialized student and industrial sessions, as well as embedded tutorials, will be organized at the symposium. Accepted papers will be included in the Symposium Proceedings and submitted for inclusion into IEEE Xplore as well as other Abstracting and Indexing databases (WoS, Scopus, etc). An extra work–in–progress session will be targeted to get early feedback on in–progress research and preliminary results (these papers will not be included in IEEE Xplore). PDF<br>A special Issue/Section of IEEE Transactions on Emerging Topics in Computing will be dedicated to the selected DDECS 2016 papers that fit to the scope of the journal. Authors of those papers, presented at DDECS 2016, will be encouraged to submit a substantially extended version to the special issue, which will then undergo a full competitive review process (target acceptance rate of 30%). There will be a specific call for this special issue with more details on submission after the conference.<br>Topics<br>DDECS covers the areas of design and testing of electronic components, both digital and analog. The topics include the following but are not limited to:<br>SoC and NoC Design and Test<br>Design and Test in Nano–Technologies<br>ASIC/FPGA Design<br>Analog, Mixed–Signal, RF Design and Test<br>Built–in Self–Test and Self–Repair<br>ATE Hardware and Software<br>Bio–Inspired Hardware Design for Testability and Diagnosis<br>Design Verification/Validation<br>On–line Testing<br>Formal Methods in System Design<br>Embedded Systems<br>Hardware/Software Co–Design Memory, Processor Testing<br>IP–based Design MEMS Testing<br>Logic Synthesis Physical Design<br>Defect/Fault Tolerance and Reliability<br>Dependable HW/SW Systems<br>
Abbrevation
DDECS
City
Kosice
Country
Slovakia
Deadline Paper
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