Abbrevation
Tensilica Day
City
Hannover
Country
Germany
Start Date
End Date
Abstract

Cadence and Leibniz Universität Hannover invite Tensilica users to the first Tensilica User Day in Europe&#046; During the first part of the day, Cadence will deliver two expert&#8211;level tutorials&#046; During the second part, academic and industrial users of Cadence® Tensilica® products will showcase their projects and talk about their experience with the technology&#046; The entrance is free&#046;<br>Tutorials Tutorial 1: What Can the TIE Language Do for You? § Tutorial 2: Xtensa + TIE Feature Update—Up to Release RF&#046;3<br>ASIP&#8211;Case Studies I § ASIP&#8211;Case Studies I(a): Tensilica at ETHZ: Accelerating Function Kernels for Elliptic Curve Operations and Mobile Communication Algorithms Michael Gautschi and Luca Benini, Integrated Systems Laboratory, ETH Zürich<br>ASIP&#8211;Case Studies I(b): Analyzing the Performance&#8211;Hardware Tradeoff of ASIP&#8211;Based Image Feature Extraction Nico Mentzer, Guillermo Payá Vayá, and Holger Blume, Institute of Microeletronic Systems, Leibniz Universität Hannover<br>ASIP&#8211;Case Studies I(c): Run Time Adaptive Processor Architectures Michael Hübner, Embedded Systems for Information Technology, Ruhr&#8211;University Bochum<br>ASIP&#8211;Case Studies I(d): A Flexible ASIP Architecture for Connected Components Labeling: Implementation, Lessons Learned, and Integration into Novel Design Tools Juan Eusse and Rainer Leupers, Institute for Communication Technologies and Embedded Systems, RWTH Aachen<br>ASIP&#8211;Case Studies II § ASIP&#8211;Case Studies II(a): Heterogeneous Multi&#8211;Core Architecture for Image Sensor Processing Featuring Tensilica Cores Hans Volkers and Jens Benndorf, Dream Chip Technologies GmbH<br>ASIP&#8211;Case Studies II(b): rASP: Reconfigurable Application Specific Processors Challenges and Opportunities Guillermo Payá&#8211;Vayá, Florian Giesemann, Stephan Nolting, and Holger Blume, Institute of Microelectronic Systems, Leibniz Universität Hannover<br>ASIP&#8211;Case Studies II(c): An MPSoC for Energy&#8211;Efficient Query Processing Sebastian Haas, Emil Matus, and Gerhard Fettweis, Vodafone Chair Mobile Communications Systems, Dresden University of Technology<br>