29th edition of the Defect and Fault Tolerance in VLSI and Nanotechnology Systems Symposium, StorrsCT, Vereinigte Staaten

Abbrevation

DFT

Link

http://www.dfts.org/

City

StorrsCT

Country

United States

Deadline Paper

2016-04-29

Start Date

2016-09-19

End Date

2016-09-20

Abstract

DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI and nanotechnology systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state–of–the–art industrial data, necessary ingredients for significant advances in this field. All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation are of interest. Topics The Program Committee cordially invites you to participate and submit your contribution to DFT 2016. The conference topics include (but are not limited to) the following: Yield Analysis and Modeling Defect/Fault analysis and models; statistical yield modeling; critical area and metrics. Testing Techniques Built–in self–test; delay fault modeling and diagnosis; testing for analog and mixed circuits; signal and clock integrity. Design For Testability in IC Design FPGA, SoC, NoC, ASIC, microprocessors. Error Detection, Correction, and Recovery Self–testing and self–checking solutions; error–control coding; fault masking and avoidance; recovery schemes, space/time redundancy; hw/sw techniques, architectural–specific techniques, system–level strategies. Dependability Analysis and Validation Fault injection techniques and environments; dependability characterization; aging modeling and analysis. Repair, Restructuring and Reconfiguration Repairable logic; reconfigurable circuit design; DFT for on–line operation; self–healing; reliable FPGA–based systems. Defect and Fault Tolerance Reliable circuit/system synthesis; radiation hardened and/or tolerant processes & design; design space exploration for dependable systems, transient/soft faults and errors; aging management and recovery strategies. Fail–Safe Design for Critical Applications Methodologies and case study applications to automotive, railway, avionics, industrial control, biomedicine, space and smart power networks. Emerging Technologies Techniques for CNTs, QCA, DNA, RTDs, SETs, molecular devices and self–assembly. Design for Security Fault attacks, fault tolerance–based counter–measures, Scan–based attacks and counter–measures, hardware trojans, security vs. reliability trade–offs, interaction between VLSI test, trust, and reliability.