IEEE 2nd International Workshop on Fault Tolerant Systems, Taipei, Taiwan

<br>Fault Tolerance is a cross&#8211;cutting issue that spans all layers of the hardware/software stack, and hence, requires coupled improvements in each layer and co&#8211;design between the different layers&#046; FTS aims at providing a venue for researchers to share experiences across the hardware/software layers and attendees to get a holistic view of fault tolerance techniques&#046;<br>Topics of Interest<br>The focus areas for this workshop include, but are not limited to:<br>Techniques for predicting, detecting, and correcting silent data corruption<br>Hardware failure prediction and recovery techniques<br>Novel hardware design for fault mitigation<br>Programming interfaces and libraries to facilitate resilience of parallel executions<br>Resilient algorithm design for application level fault tolerance<br>Failure modeling and analysis<br>Checkpoint/restart model<br>Replication model<br>Fault injection techniques for improved tool development<br>Hardware and software fault detection and reporting systems<br>Fault tolerance for coupled executions, workflows, and in situ data analytics<br>Algorithms for performance optimization in the presence of faults<br>Techniques and algorithms for rollback recovery<br>