IEEE International High-Level Design Validation and Test Workshop, Santa Cruz, Vereinigte Staaten

Abbrevation

HLDVT

Link

http://hldvt.org

City

Santa Cruz

Country

United States

Deadline Paper

2016-07-31

Start Date

2016-10-07

End Date

2016-10-08

Abstract

The 18th HLDVT workshop aims to bring together a community of researchers in the areas of design validation and test of hardware, software, cyber–physical systems, biological systems, and biochips. The workshop addresses the integration of multiple functions on–chip/in–system at higher levels of design abstraction, and the techniques and methodologies for modeling, analyzing, and validating such systems. In particular, the workshop has become a unique forum for researchers and practitioners to discuss the practical issues associated with validation of extremely large designs. Topics of interest include, but are not limited to: – Simulation–Based Validation – Formal Verification, and Hybrid Methods – Design Abstraction, and Behavioral Modeling – Error Trace Interpretation, and Debugging – Functional Safety/Safety–critical System Verification – On–Chip, and Core–Based Testing – Test Generation for Defects, Design Errors, and Delay Faults – Hardware/Software, and Mixed–signal System Co–Validation – Emulation, and Prototyping – Post–silicon Validation, and Debug.