The 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART) is a forum to present and discuss new research on accelerators and the use of reconfigurable technologies for high–performance and/or power–efficient computation. Submissions are solicited on a wide variety of topics related to the acceleration for high–performance computation, including but not limited to:<br>– Architectures and systems:<br>––– Novel systems/platforms for efficient acceleration based on FPGA, GPU, and other devices<br>––– Heterogeneous processor architectures and systems for scalable, high–performance, high–reliability, and/or low–power computation<br>––– Reconfigurable and configurable hardware and systems including IP–cores, embedded systems, SoCs, and cluster/grid/cloud computing systems for scalable, high–performance and/or low–power processing<br>––– Custom computing system for domain–specific applications such as Big–data, multimedia, bioinformatics, cryptography, and more<br>––– Novel architectures and device technologies that can be applied to efficient acceleration, including many–core/NoC architectures, 3D–stacking technologies and optical devices<br>– Software and applications:<br>––– Novel applications of high–performance computing and Big–data processing with efficient acceleration and custom computing<br>––– System software, compilers and programming languages for efficient acceleration systems / platforms, including many–core<br>processors, GPUs, FPGAs and other reconfigurable /custom processors<br>––– Run–time techniques for acceleration, including Just–in–Time compilation and dynamic partial–reconfiguration<br>––– Performance evaluation and analysis for efficient acceleration<br>––– High–level synthesis and design methodologies for heterogeneous, reconfigurable and/or custom processors/systems<br>
Abbrevation
HEART
City
Bochum
Country
Germany
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