We invite original paper submissions related to (but not limited to) the following topics:<br>Processor, memory, interconnect, and storage architectures.<br>Hardware, software, and hybrid techniques for improving system performance, energy–efficiency, cost, complexity, predictability, quality of service, reliability, dependability, security, scalability, programmer productivity, etc.<br>Architectures for instruction–level, thread–level, and memory–level parallelism: superscalar, VLIW, data–parallel, multithreaded, multicore, manycore, etc.<br>Compiler and microarchitectural techniques for parallelism (ILP, TLP, MLP).<br>Low–power, high–performance, and cost/complexity–efficient architectures.<br>Architectures for emerging platforms, including smartphones, cloud/datacenter, etc.<br>Architectures and compilers for embedded processors, DSPs, GPUs, ASIPs (network processors, multimedia, wireless, deep learning, neuromorphic, etc.).<br>Advanced software/hardware speculation and prediction schemes.<br>Microarchitecture techniques to better support system software, programming languages, programmability, and compilation.<br>Microarchitecture modeling and simulation methodology.<br>Insightful experimental and comparative evaluation and analysis of existing microarchitectures, hardware/software mechanisms and workloads.<br>
Abbrevation
MICRO
City
Boston
Country
United States
Deadline Paper
Start Date
End Date
Abstract