10th Workshop on UnConventional High Performance Computing, Santiago de Compostela, Spanien

Abbrevation

UCHPC

Link

http://uchpc.lrr.in.tum.de/17

City

Santiago de Compostela

Country

Spain

Deadline Paper

2017-05-05

Start Date

2017-08-28

End Date

2017-08-29

Abstract

Recent issues with the power consumption of conventional HPC hardware results in both new interest in accelerator hardware and in usage of mass–market hardware originally not designed for HPC. The most prominent examples are GPUs, but FPGAs, DSPs and embedded designs are also possible candidates to provide higher power efficiency, as they are used in energy–restriced environments, such as smartphones or tablets. The so–called "dark silicon" forecast, i.e. not all transistors may be active at the same time, may lead to even more specialized hardware in future mass–market products. Exploiting this hardware for HPC can be a worthwhile challenge. As the word "UnConventional" in the title suggests, the workshop focuses on hardware or platforms used for HPC, which were not intended for HPC in the first place. Reasons could be raw computing power, good performance per watt, or low cost in general. To address this unconventional hardware, often, new programming approaches and paradigms are required to make best use of it. A second focus of the workshop is on innovative, (yet) unconventional new programming models. To this end, UCHPC tries to capture solutions for HPC which are unconventional today but could become conventional and significant tomorrow, and thus provide a glimpse into the eventual future of HPC. Topics –––––– The goal of this workshop is to present research exploring currently unconventional techniques for HPC and their benefits. UCHPC also covers according programming models, compiler techniques, and tools. Thus, suggested topics for papers include, but are not limited to the following: * Innovative use of hardware and software unconventional for HPC * HPC applications or visualizations in connection with HPC on GPUs (GPGPU), using GPUs embedded on processor dies (as found in AMD Fusion/APUs, NVidia Denver, Intel Ivy Bridge), Intel′s MIC and SCC, low power/embedded processors (including DSPs, Adapteva Epiphany), FPGAs (e.g. Convey), Tilera′s tile–based many–core processors, Processing in Memory (PIM), accelerators, etc. * Cluster/Grid solutions using unconventional hardware, e.g. clusters of game consoles, nodes using GPUs, Low Power/Embedded Processors, MPSoCs, new many–cores from Intel and/or ARM designs, Mac Minis/AppleTVs, FPGAs etc. * Heterogeneous computing on hybrid platforms * Work on and use of new programming models and paradigms needed to support unconventional hardware, and hybrid/hierarchical combinations with more conventional systems. Examples are OpenACC, OpenCL, Cilk+, and task–based approaches for heterogeneous systems * Performance and scalability studies in HPC using unconventional hardware * Reconfigurable computing for HPC * Performance modeling, analysis and tools for HPC with unconventional hardware * (Yet) unconventional programming models for HPC, including PGAS, task–based or data–flow concepts, as well as supporting tools * Big data and/or deep learning using unconventional HPC hardware or software * Mapping problem specifications onto heterogenenous architectures