We are pleased to invite you to submit research papers to the 24st IEEE International Symposium on Asynchronous Circuits and Systems to be held in Vienna, Austria on May13–16, 2018 to bring together innovative academics and industrial experts to a common forum. For more information please access the official website of the ASYNC2018 at Vienna, Austria at http://async2018.wien.<br>The International Symposium on Asynchronous Circuits and Systems (ASYNC) is the premier forum for researchers to present their latest findings in asynchronous design.<br>Authors are invited to submit papers on any aspect of asynchronous design, ranging from design, synthesis, and test to asynchronous applications.<br>Topics of interest include:<br>–– Asynchronous pipelines, architectures, CPUs, and memories<br>–– Asynchronous ultra–low power systems, energy harvesting, and mixed–signal/analogue<br>–– Asynchrony in emerging technologies, including bio, neural, nano, and quantum computing<br>–– CAD tools for asynchronous design, synthesis, analysis, and optimization<br>–– Formal methods for verification and performance/power analysis<br>–– Test, security, fault tolerance, and radiation hard design<br>–– Asynchronous variability–tolerant design, resilient design, and design for manufacturing<br>–– Asynchronous design for neural networks and machine learning applications<br>–– Circuit designs, case studies, comparisons, and applications<br>–– Mixed–timed circuits, clock domain crossing, GALS systems, Network–on–Chip, and multi–chip interconnects<br>–– Hardware implementations of asynchronous models and algorithms, asynchronous techniques in clocked designs, and elastic and latency–tolerant synchronous design<br>
Abbrevation
ASYNC
City
Vienna
Country
Austria
Deadline Paper
Start Date
End Date
Abstract