<p>Join Cadence at the Concar Expo 2018 in booth 60, where we are presenting an ADAS reference platform featuring an SoC with four Cadence<sup>®</sup> Tensilica<sup>®</sup> Vision P6 DSPs. The SoC achieves high–performance processing and high data throughput while keeping power consumption to a minimum. This is especially important for image–processing applications in automotive, computer vision, and neural networks applications.</p> <p>See our demos on:</p> <p><b>AI for pedestrian recognition</b><br>The On–Device Artificial Intelligence (AI) demonstration of pedestrian recognition uses the Tensilica Vision P6 DSP and TinyYOLO (You Only Look Once) algorithm. The algorithm is based on a neural network and is trained in the recognition of persons. TinyYOLO is ideal for applications that require fast, energy–efficient object detection (including localization) for multiple object categories.</p> <p><b>AI for image classification and object recognition</b><br>Software developers use environments such as Caffe or TensorFlow in the design of neural networks for image classification. The sometimes very complex networks then have to be manually ported to a hardware platform and optimized—a challenging and time–consuming task. For this, Cadence has developed the Xtensa<sup>®</sup> Neural Network Compiler (XNNC), which shortens the time required to convert the neural network into code for a Tensilica AI DSP, as an embedded (target) processor, from months to just days. An XNNC demonstration will show the implementation of a Caffe or TensorFlow–trained Google Inception V3 and MobileNet. The XNNC converts them into a highly optimized fixed–point neural network code for the Tensilica Vision DSPs.</p><p><br></p>
City
Berlin
Country
Germany
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