Abbrevation
Dasip
City
Porto
Country
Portugal
Deadline Paper
Start Date
End Date
Abstract

<br>The scope of the meeting includes, but is not limited to:<br>Design Methods and Tools<br>Design verification and fault tolerance<br>Embedded system security and security validation<br>System&#8211;level design and hardware/software co&#8211;design<br>High&#8211;level synthesis, logic synthesis, communication synthesis<br>Embedded real&#8211;time systems and real&#8211;time operating systems<br>Rapid system prototyping, performance analysis and estimation<br>Formal models, transformations, algorithm transformations and metrics<br>Development Platforms, Architectures and Technologies<br>Embedded platforms for multimedia and telecom<br>Many&#8211;core and multi&#8211;processor systems, SoCs, and NoCs<br>Reconfigurable ASIPs, FPGAs, and dynamically reconfigurable systems<br>Overlay architectures, languages and compilers<br>Memory system and cache management<br>Asynchronous (self&#8211;timed) circuits and analog and mixed&#8211;signal circuits<br>Custom embedded architectures and systems<br>Deep learning architectures for inference and training<br>Systems for autonomous vehicles : cars, drones, ships and space applications<br>Smart cameras, security systems, behaviour recognition<br>Data Center processing : special routing, configurable co&#8211;processors and low energy considerations<br>Real&#8211;time cryptography, secure computing, financial and personal data processing<br>Computer arithmetic, approximate computing, probabilistic computing, nanocomputing, bio&#8211;inspired computing<br>Biological data collection and analysis, bioinformatics<br>Personal digital assistants, natural language processing, wearable computing and implantable devices<br>Global navigation satellite and inertial navigation systems<br>The scope of the meeting includes, but is not limited to:<br>Design Methods and Tools<br>Design verification and fault tolerance<br>Embedded system security and security validation<br>System&#8211;level design and hardware/software co&#8211;design<br>High&#8211;level synthesis, logic synthesis, communication synthesis<br>Embedded real&#8211;time systems and real&#8211;time operating systems<br>Rapid system prototyping, performance analysis and estimation<br>Formal models, transformations, algorithm transformations and metrics<br>Development Platforms, Architectures and Technologies<br>Embedded platforms for multimedia and telecom<br>Many&#8211;core and multi&#8211;processor systems, SoCs, and NoCs<br>Reconfigurable ASIPs, FPGAs, and dynamically reconfigurable systems<br>Overlay architectures, languages and compilers<br>Memory system and cache management<br>Asynchronous (self&#8211;timed) circuits and analog and mixed&#8211;signal circuits<br>Custom embedded architectures and systems<br>Deep learning architectures for inference and training<br>Systems for autonomous vehicles : cars, drones, ships and space applications<br>Smart cameras, security systems, behaviour recognition<br>Data Center processing : special routing, configurable co&#8211;processors and low energy considerations<br>Real&#8211;time cryptography, secure computing, financial and personal data processing<br>Computer arithmetic, approximate computing, probabilistic computing, nanocomputing, bio&#8211;inspired computing<br>Biological data collection and analysis, bioinformatics<br>Personal digital assistants, natural language processing, wearable computing and implantable devices<br>Global navigation satellite and inertial navigation systems<br>