During the past decade, ReCoSoC has established itself as a reference international event for researchers in the areas of reconfigurable and communication–centric systems–on–chip. Its informal and dynamic philosophy encourages the technical and scientific interactions between senior academics and young researchers.<br>All accepted papers will be published in IEEE Xplore. The authors of the best papers will be invited to submit an extended version of their contribution to the journal Microprocessors and Microsystems: Embedded Hardware Design (MICPRO, Elsevier).<br>Areas of interest<br>New paradigms for communication–centric, adaptive and reconfigurable computing<br>Reconfigurable and adaptive embedded SoCs<br>FPGAs and reconfigurable hardware accelerators for HPC, cloud and machine learning<br>On–chip communication architectures (buses and networks–on–chip – NoCs)<br>Communication–centric design techniques at different abstraction levels<br>Communication–aware multiprocessor embedded systems<br>Low power design of reconfigurable and multiprocessor SoCs<br>Run–time thermal and power management<br>OS and middleware for reconfigurable and multicore SoCs<br>FPGAs and reconfigurable hardware for internet–of–things (IoT)<br>Approximate computing in FPGAs<br>FPGAs and reconfigurable computing for software programmers<br>Specification languages and design methodologies supporting the topics above<br>Verification and evaluation techniques supporting the topics above<br>Industrial case studies applying the topics above to domains such as HPC, networking, telecom, cloud computing and transportation systems.<br>
Abbrevation
ReCoSoC
City
York
Country
UK
Deadline Paper
Start Date
End Date
Abstract