SCOPE AND OBJECTIVES<br>Computational, storage, accelerators, and sensing resources are required to be interconnected in efficient ways in most complex systems such as data–centers and cloud infrastructures, data centers interconnects, cyber physical security systems, many–core processors, HPC and reconfigurable platforms.<br>This workshop is concerned with the design of high performance interconnection networks and interconnects for such complex systems. Also of interest is to explore systems using high performance interconnection networks and interconnects. It is intended to serve as a forum to bring together researchers from academia and the experts from industry to present and discuss innovative ideas and solutions in high performance interconnection networks. These will be also critical on the march to Exascale era.<br>Selected high–quality papers from the workshop will be invited for extension and publication in a special issue in the International Journal Microprocessors and Microsystems and other well established scientific journals.<br>The HPINI Workshop topics include (but are not limited to) the following:<br>Multi–core on–chip Interconnects, Clusters Interconnects, Systems Interconnects, and Data Centers Interconnects<br>Hardware and software architectures and implementations for interconnection networks<br>On/Off–chip interconnection network architecture (topology, routing, arbitration, ...)<br>(Self–aware) Quality of Service<br>Design, implementation, and evaluation of interconnect standards (InfiniBand, Ethernet, PCI–Express, HyperTransport)<br>Performance and power management issues<br>Asynchronous interconnect designs<br>System modelling and simulation<br>Reliability, scalability, availability, and fault tolerance<br>(Self–aware) reconfigurability issues<br>Interconnects for Memory system design and optimizations<br>Flow control and congestion management<br>Implementing HPIN with FPGAs<br>HPIN for cyber physical systems<br>HPIN for cyber security<br>Application specific HPIN<br>HPIN for data centers<br>Reconfigurable/Programmable interconnect components<br>Impact of the interconnect on application performance<br>
Abbrevation
HPINI
City
Dublin
Country
Ireland
Deadline Paper
Start Date
End Date
Abstract