VLSI–SoC 2019 is the 27th in a series of international conferences sponsored by IFIP TC 10 Working Group 10.5, IEEE CEDA and IEEE CASS, which explores the state–of–the–art in the areas that surround Very Large Scale Integration (VLSI) and System–on–Chip (SoC). Previous conferences have taken place in Edinburgh, Trondheim, Tokyo, Vancouver, Munich, Grenoble, Gramado, Lisbon, Montpellier, Darmstadt, Perth, Nice, Atlanta, Rhodes, Florianópolis, Madrid, Hong Kong, Santa Cruz, Istanbul, Playa del Carmen, Daejeon, Tallinn, Abu Dhabi, and Verona. The purpose of VLSI–SoC is to provide a forum to exchange ideas and showcase research as well industrial results in EDA, design methodology, test, design, verification, devices, process, systems issues and application domains of VLSI and SoC.<br>Topics of interest include but are not limited to:<br>Analog, mixed–signal, and sensor architectures.<br>Digital architectures: NoC, multi– and many–core, hybrid, and reconfigurable<br>CAD: Synthesis and analysis<br>Prototyping, verification, modeling, and simulation<br>Circuits and systems for signal processing and comm.<br>Embedded & Cyber Systems: Arch., design, and software<br>Low–power and thermal–aware IC design.<br>Emerging technologies and computing paradigms.<br>Variability, reliability, and test.<br>Hardware security.<br><div>Machine learning for SoC design and for electronic design.</div><div><br></div><div><b style="color: rgb(0, 0, 0); font–family: Calibri, sans–serif; font–size: 14.6667px; font–style: normal; font–variant–ligatures: normal; font–variant–caps: normal; letter–spacing: normal; orphans: 2; text–align: start; text–indent: 0px; text–transform: none; white–space: normal; widows: 2; word–spacing: 0px; –webkit–text–stroke–width: 0px; text–decoration–style: initial; text–decoration–color: initial;"><span style="font–size: 10.5pt; color: black;">Paper Submission: May 9, 2019 (extended and final deadline)</span></b></div><br>
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VLSI-SOC
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Cusco
Country
Peru
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