SCOPE<br>ParaFPGA has become a regular track in the Parallel Computing conference to collect and disseminate recent research on the development and use of reconfigurable architectures in high–performance computing. Field Programmable Gate Arrays are becoming mainstream accelerators of data centers, high–end processors, web services and cloud computing. The power of the reconfigurable hardware resides in an ever growing ecosystem of tools, programming environments and applications. High–performance computing requires new avenues and creative solutions to alleviate the power and frequency limitations of today′s processors. New reconfigurable architectures and designs are now managed by common languages such as OpenCL combined with dedicated programming and synthesis environments. Still, parallel programming of FPGAs present exciting opportunities for research and development. Therefore this call for papers invites original contributions in or related to the following areas :<br>– parallel processing using FPGAs in e.g. image processing, deep learning, bioinformatics, smart contracts or cloud computing<br>– design space exploration tools and techniques<br>– OpenCL–based FPGA design<br>– domain specific high–level synthesis languages<br>– partial reconfiguration to reuse IP–cores<br>– run–time management of IP–cores<br>– hybrid CPU/GPU/FPGA systems for e.g. real–time video or automotive systems<br>– performance evaluation of FPGA architectures and applications<br><div><br></div>
Abbrevation
ParaFPGA
City
Prague
Country
Czechia
Deadline Paper
Start Date
End Date
Abstract