Abbrevation
ASSCC
City
Macao
Country
China
Deadline Paper
Start Date
End Date
Abstract

Conference Overview<br>The IEEE A&#8211;SSCC 2019 (Asian Solid&#8211;State Circuits Conference) is an international forum for presenting the most updated and advanced chips and circuit designs in solid&#8211;state and semiconductor fields&#046; The conference is supported by the IEEE Solid&#8211;State Circuits Society and will be held in Asia&#046;<br>Conference Theme<br>Silicon System for Next Smart Society<br>Solid&#8211;state circuits have improved our lives for more than 50 years&#046; There is no doubt that we have benefited from a wide variety of electronic equipment such as mobile computing devices, car electronics and digitalized social infrastructures&#046;Rapid progress of artificial intelligence accelerated by deep learning, in conjunction with big data collected by IoT, may change our lives non&#8211;linearly&#046; As a consequence, we will use smarter mobile devices, drive or be driven by, smarter cars and live on a smarter infrastructure, leading to totally different quality of life&#046; There, we will face new challenges and opportunities for silicon systems, which our community should overcome and take advantage of&#046;<br>Regular Session<br>1&#046; Analog Circuits &amp; Systems: Amplifiers, comparators, switched capacitor circuits, continuous&#8211;time &amp; discrete&#8211;time filters, voltage/current references;DC&#8211;DC converters, power&#8211;control circuits; IF/baseband analog circuits, AGC/VGA; non&#8211;linear analog circuits&#046;<br>2&#046; Data Converters: Nyquist&#8211;rate and oversampling A/D, D/A converters, time&#8211;to&#8211;digital converters, and capacitance&#8211;to&#8211;digital converters; sub&#8211;circuits fordata converters including sample&#8211;and&#8211;hold circuits, calibration circuits, etc&#046;<br>3&#046; Digital Circuits &amp; Systems: Design, fabrication, and test of digital VLSI systems; high&#8211;speed low&#8211;power digital circuits, power&#8211;reduction andmanagement methods for digital VLSI, ultra&#8211;low&#8211;voltage and sub&#8211;threshold logic design; leakage reduction techniques; clock distribution, I/O circuits,reconfigurable logic&#8211;array circuits; supply/substrate noise measurement and cancellation for digital VLSI, variation and fault&#8211;tolerant circuits&#046;<br>4&#046; SoC &amp; Signal Processing Systems: System&#8211;on&#8211;chip(including 3D integration), microprocessors, network processors, baseband communicationprocessing system &amp; architectures, system&#8211;level power management; multimedia and recognition processing systems; cryptographic, security, machinelearning,deep&#8211;learning, and neuromorphic circuits and systems; bio&#8211;medical/neural&#8211;network processors and sensor network systems&#046;<br>5&#046; RF: Receivers/transmitters/transceivers for wireless systems; narrowband RF, ultra&#8211;wideband and millimeter&#8211;wave circuits; circuits and building&#8211;blocksincluding RF front&#8211;end, LNA, mixer, power amplifiers, VCOs, frequency synthesizers, RF filters, RF switches, power detectors, active antennas&#046;<br>6&#046; Wireline: Receivers/transmitters/transceivers for wireline systems; optical/electrical data links and backplane transceivers; power&#8211;line communication;clock generation circuits, PLL, DLL, spread&#8211;spectrum clock generation; building blocks for high&#8211;speed wireline communication; analog&#8211;digital mixedmodecircuits&#046;<br>7&#046; Emerging Technologies and Applications: Advanced system designs and circuit solutions for technologies and applications including state&#8211;of&#8211;the&#8211;artdevices and packaging technologies; flexible and printable electronics;silicon photonices;smart sensors and transducers; MEMS for analog, RF, and sensor applications;image sensors and displays; energy harvesting systems; transceiver systems; medical/bio&#8211;electronics/bio&#8211;inspired chip design,artificial intelligent system,and cryogenic circuits and systems&#046;<br>8&#046; Memory: Volatile and Non&#8211;volatile memory; new memory designs for 3D/2D architectures, emerging devices such as resistive&#8211;/phase change&#8211;/magnetic&#8211;/ferro&#8211;electric&#8211; memory devices; data storage and multi&#8211;bit&#8211;cell memory design; cache&#8211;memory system, multi&#8211;port memory, memory subsystem,processing in memory, and CAM design; yield&#8211;enhancing and ECC techniques; memory testing and built&#8211;in self&#8211;test&#046;<br>9&#046; FPGA: Novel algorithm and/or architecture for integrated circuits validated by FPGA implementation&#046; The authors of accepted papers are required to participate in demo sessions&#046;<br>Special Session<br>1&#046; Industry Program: This special category accepts only papers based on state&#8211;of&#8211;the&#8211;art industrial products&#046; Strong emphasis on systems realized bysilicon chips is encouraged&#046; The papers should cover architecture, circuits, process technology, packaging and testing, includin g characterization results,die and system photos, as well as product demos&#046;<br>2&#046; Student Design Contest: A student design contest is held among the accepted papers with system prototypes or measurement results of whichoperations can be demonstrated on&#8211;site&#046; Refer to the web for further information&#046;<br>