32nd IEEE International System-on-Chip Conference, Singapore, Singapur

Abbrevation

IEEE SOCC

Link

https://www.ieee-socc.org/

City

Singapore

Country

Singapore

Deadline Paper

2019-05-13

Start Date

2019-09-03

End Date

2019-09-06

Abstract

Multibillion transistor System on Chip (SoC) devices, comprised of RF, analog, optical, digital and Micro–Electro–Mechanical Systems (MEMS), are integral parts of ubiquitous communication, entertainment, medical, logistics and carrier products. SoC has been the enabling technology and main thrust behind the evolution of the Internet into a global communication and economic paradigm. Recent advances in systems, deep–submicron and nano process technology are unleashing new opportunities, and also new challenges. These challenges include managing design and verification complexity, EDAtools, on–chip communication, design reuse, handling inevitable faults, and the efficient integration of emerging MEMS and nano components into next generation SoCs. For more than 30 years the IEEE International System–on–Chip Conference (SOCC) has been the premier forum for sharing the latest advancements in SoC architecture, systems, logic and circuit design, process technology, test, design tools, and applications. We proudly continue this tradition with the 2019 conference in Singapore. The 32nd SOCC offers a three–day technical program including keynote and plenary speeches, oral and poster presentations, hot–topic panel sessions, and a full day of tutorials held by experts in the field. In addition, SOCC has a long tradition of high–class social events complementing the technical program, helping you to discuss your work with your colleagues, and enhancing your professional network. SOCC Areas of Interests: Papers are invited which address new and previously unpublished results in the areas related to SoC, which include (and are not limited to): – Circuits and Systems: RF, analog, mixed–signal; Biomedical; Wireline and wireless communication; Digital signal processing (DSP); Memory systems; Reconfigurable and programmable circuits – Low Power Design: “Green” circuits & systems; Low power methodologies; Power/energy/thermal aware architecture design; Multidomain power/energy management – MPSoC Architecture: On–chip interconnect; Network on Chip (NoC) and multicore architectures; Memory architecture for multicore computing; 3D–IC; Heterogeneous computing; Parallel programming and software models – Design Methodologies: HW–SW codesign, reconfiguration and debug; System level design methodology and tools; Heterogeneous design flows; Design validation and verification; Design for Testability, test synthesis, embedded test – Application Specific Design: SoC for automotive systems; Embedded computing and Internet of Things (IoT); High–performance mobile SoCs; Security; Real–time, high reliability and safety SoCs; Imaging and Vision; Cloud Solutions – Emerging and Evolutionary Design: Many–core architectures; General purpose GPU (GPGPU) computing; FPGA accelerated computing; Server on a Chip; Cortical processors; Neuronal and neuromorphic computing; Quasntum Computing; Futuristic development and optimization tools.