Abbrevation
FPGA
Link
http://isfpga.org/
City
Seaside
Country
United States
Deadline Paper
Start Date
End Date
Abstract

1. Research Papers As usual, we solicit research papers related to the following areas: FPGA Architecture: Architectures for programmable logic fabrics or their components, including routing, flexible logic cells, embedded blocks (memory, DSP, processors), and I/O interfaces. Novel commercial architectures and architectural features. FPGA Circuit Design: Circuits and layout techniques for design of FPGAs. Impact of future process and design technologies on FPGAs. Methods for analyzing and improving static and dynamic power, power and clock distribution, yield, manufacturability, security, reliability, and testability. Use of novel memory or nano–scale devices in FPGAs. CAD for FPGAs: Algorithms for synthesis, technology mapping, logic and timing optimization, clustering, placement, and routing of FPGAs. Novel design software for system–level partitioning, debug, and verification. Algorithms for modeling, analysis and optimization of timing and power. High–Level Abstractions and Tools for FPGAs: General–purpose and domain–specific languages, tools, and techniques to facilitate the design, debugging and verification of FPGA–based applications and systems. Novel hardware/software co–design and high–level synthesis methodologies enabling digital signal processing, compute acceleration, networking, machine learning, and embedded systems. FPGA–based and FPGA–like Computing Engines: Systems and software for compiled accelerators, reconfigurable computing, adaptive computing, and rapid–prototyping. Programmable overlay architectures implemented using FPGAs. Applications and Design Studies: Implementation of novel designs on FPGAs establishing state–of–the–art in high–performance, low–power, efficiency, security, or high–reliability. Designs leveraging unique capabilities of FPGA architectures or demonstrating significant improvements over alternative programmable technologies (e.g., CPU, GPU). Design studies or architecture explorations enabling improvement of FPGA architectures.